Inverted-T gate MOSFET - uses separate deposition of thin poly:silicon@ layer for gate electrode overlying the lightly doped diffused regions for higher reliability

摘要

The inverted-T gate MOS transistor is made as follows: on a substrate (21) a gate oxide layer (22), polySi layer (23) and metal layer (24), pref. of W or Ti and to act as a shielding layer, are deposited in this order. A polySi gate is defined and the polySi layer layer etched back pref. until the gate-oxide layer shows, and then used to mask the implantation of lightly doped drain and source regions (25). A second poly-Si layer (26) is deposited and then a low temp. oxide layer, pref. with a high dielectric constant, pref. Ta2O5 from which oxide spacers (27A) are formed adjacent to the sides of the poly-Si gates. The uncovered regions of polysi are etched away and a high concn. implantation carried out to give low resistance source- and drain-regions. USE/ADVANTAGE - The process is simpler and capable of higher yield than current processes. The Nmos process claimed can also be used as part of a Cmos process. The process is easily controlled and uses no additional masking steps. No unnecessary layers inside the gate structure are used as in some current techniques.