发明名称 Memory arrangement and method for addressing a memory
摘要 A memory arrangement includes a plurality of switching elements arranged in the form of a binary tree. The memory elements are supplied with data to be stored by the switching elements coupled to the leaves of the binary tree.
申请公布号 US7366031(B2) 申请公布日期 2008.04.29
申请号 US20060497536 申请日期 2006.08.01
申请人 INFINEON TECHNOLOGIES AG 发明人 HACHMANN ULRICH
分类号 G11C7/00;G11C8/00 主分类号 G11C7/00
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