Interleave circuit, de-interleave circuit and xDSL modem

摘要

When a frame length N of input data is an even number, a read address generator generates twice in succession an address at which head byte data of each frame of the input data is stored. The head byte data of each frame of the input data is thus read from a memory twice in succession. The data of the frame length (N+1) having the head byte data of each frame inserted as a dummy byte is then written to another memory according to a write address from a write address generator.