发明名称 |
Logic circuit with negative differential resistance device |
摘要 |
A logic circuit including a pair of FETs connected in parallel and including first and second common current terminals, each of the FETs further having a control terminal connected to receive a logic signal thereon. A negative differential resistance device affixed to one of the first and second common current terminals and having a conductance characteristic such that the device operates at a peak current when one of the FETs is turned ON and at a valley current when both of the FETs are simultaneously turned ON. A load resistance coupled to the other of the first and second common current terminals and providing an output for the logic circuit.
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申请公布号 |
US5477169(A) |
申请公布日期 |
1995.12.19 |
申请号 |
US19940261799 |
申请日期 |
1994.06.20 |
申请人 |
MOTOROLA |
发明人 |
SHEN, JUN;GORONKIN, HERBERT;TEHRANI, SAIED N. |
分类号 |
H01L21/822;G11C5/14;H01L27/04;H01L29/06;H01L29/66;H01L29/86;H01L29/88;H03K19/094;H03K19/0944;H03K19/10;H03K19/21;(IPC1-7):G06F7/50 |
主分类号 |
H01L21/822 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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