| 摘要 |
PROBLEM TO BE SOLVED: To reduce the current consumption, to stabilize the test time action of a memory device and to improve the reliability in a test, by providing current control blocks in respective bit memory means, controlling currents of respective main amplifiers according to a normal mode and a test mode and reducing the currents at the test mode time. SOLUTION: In the test mode, a test mode decision signal RMAT is outputted, and respective NMOS transistors N11-N13 of first, second current control circuits 241, 242 constituting a current control block are turned off. A free charge circuit 221 is operated by equalization signals EQB, EQ, and respective input terminals CIOT, CIOB are equalized. Further, a read enable signal is outputted from a signal amplifier part in all enable, and the first, second differential amplifier circuits 222, 223 of the main amplifiers in a signal amplifier block are all operated. However, since their currents flow through only NMOS transistors N3, N6, N9 side, to be limited. |
