| 摘要 |
PROBLEM TO BE SOLVED: To provide a combination test method capable of testing easily a receiver for inputting a signal including a desired amount of jitter, even when an output signal from a transmitter is at a high speed. SOLUTION: A PLL circuit 107 inputs a reference clock signal impressed with the jitter from a jitter generation macro 110, and generates a multiplied clock signal multiplied 32 times. A serializer 105 is synchronized with the multiplied clock signal generated by the PLL circuit 107, and outputs a serial data of a serial-converted test pattern from a pattern generation part 102. A deserializer 106 regenerates a parallel data from the serial data. The jitter exceeding a prescribed amount of jitter is superposed in the serial data input into the deserializer 106, as the jitter impressed to the reference clock signal is superposed to the multiplied clock signal. A pattern comparison part 103 determines whether the deserializer 106 regenerates the test pattern correctly or not. COPYRIGHT: (C)2005,JPO&NCIPI
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