Timing-drift calibration

摘要

The disclosed embodiments relate to components of a memory system that support timing-drift calibration. In specific embodiments, this memory system contains a memory device (or multiple devices) which includes a clock distribution circuit and an oscillator circuit which can generate a frequency, wherein a change in the frequency is indicative of a timing drift of the clock distribution circuit. The memory device also includes a measurement circuit which is configured to measure the frequency of the oscillator circuit. Additionally, the memory system contains a memory controller which can transmit a request to the memory device to trigger the memory device to measure the frequency of the oscillator circuit. The memory controller is also configured to receive the measured frequency from the memory device and uses the measured frequency to determine the timing drift in the memory device.

主权项

1. A memory device comprising:
a clock distribution circuit having a clock tree structure; an internal ring oscillator to generate a frequency, wherein a change in the frequency is indicative of a change in a timing delay in the clock tree structure; a logic circuit coupled to the internal ring oscillator, the logic circuit to control a measurement duration; a counter coupled to the internal ring oscillator and to the logic circuit, the counter to count a number of oscillator periods in the internal ring oscillator during the measurement duration, wherein the number of oscillator periods is indicative of the frequency of the internal ring oscillator; and a register to store a value representing the number of oscillator periods.