CIRCUIT FOR GENERATING CLOCK

摘要

PROBLEM TO BE SOLVED: To synchronize timings of respective clocks, and to facilitate a test even when plural paths of clocks exist, in an LSI operated by the clocks of plural different frequencies. SOLUTION: An input clock CI is divided by a dividing means 101 to generate a divided clock Cn used for an actual operation and a testing clock TC used for the test. The two clocks are selected by a selection means 102 based on a test mode signal TS, to be output as selection clocks SC to a synchronization means 103. A timing deviation is retrained from being generated in a transfer of an FF data between respective output clocks COn, and execution of the test such as a scan test is facilitated, when the LSI operated by the clocks of the plural different frequencies is tested, by generating the output clocks COn of n-pieces in which the selection clocks SC are synchronized with the input clock CI.