发明名称 Source and drain doping profile control employing carbon-doped semiconductor material
摘要 Carbon-doped semiconductor material portions are formed on a subset of surfaces of underlying semiconductor surfaces contiguously connected to a channel of a field effect transistor. Carbon-doped semiconductor material portions can be formed by selective epitaxy of a carbon-containing semiconductor material layer or by shallow implantation of carbon atoms into surface portions of the underlying semiconductor surfaces. The carbon-doped semiconductor material portions can be deposited as layers and subsequently patterned by etching, or can be formed after formation of disposable masking spacers. Raised source and drain regions are formed on the carbon-doped semiconductor material portions and on physically exposed surfaces of the underlying semiconductor surfaces. The carbon-doped semiconductor material portions locally retard dopant diffusion from the raised source and drain regions into the underlying semiconductor material regions, thereby enabling local tailoring of the dopant profile, and alteration of device parameters for the field effect transistor.
申请公布号 US9385237(B2) 申请公布日期 2016.07.05
申请号 US201514687210 申请日期 2015.04.15
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 Kerber Pranita;Ontalus Viorel;Wall Donald R.;Zhu Zhengmao
分类号 H01L29/16;H01L29/786;H01L21/8234;H01L29/66;H01L29/08;H01L29/165;H01L29/417;H01L29/06;H01L29/167;H01L29/78 主分类号 H01L29/16
代理机构 Scully, Scott, Murphy & Presser, P.C. 代理人 Scully, Scott, Murphy & Presser, P.C. ;Meyers Steven J.
主权项 1. A semiconductor structure including a field effect transistor (FET), said semiconductor structure comprising: an underlying source/drain region; a carbon-doped semiconductor material portion located on a surface of a portion of said underlying source/drain region; and a raised source/drain region in contact with a surface of said carbon-doped semiconductor material portion and in contact with a surface of another portion of said underlying source/drain region, wherein a first interface between said another portion of said underlying source/drain region and said raised source/drain region is spaced from a gate stack of said field effect transistor by a greater lateral distance than a second interface between said portion of said underlying source/drain region and said carbon-doped semiconductor material portion, and wherein a bottom surface of said carbon-doped semiconductor material portion is coplanar with a bottom surface of said raised source/drain region.
地址 Armonk NY US