Method of designing integrated circuit using hierarchical design technique

摘要

A method of designing a layout of an integrated circuit is composed of providing a macro in which a macro circuit is to be accommodated in a top level hierarchical cell; and determining a layout of an interconnecting path provided on the top level hierarchical cell. The interconnecting path is used for transmitting a signal from a first position located outside the macro to a second position located outside the macro such that the interconnecting path passes through the macro. The interconnecting path includes first and second buffers placed substantially on a boundary of the macro, a first interconnection connecting the first position to an input of the first buffer, and a second interconnection connecting an output of the second buffer to the second position. An output of the first buffer is electrically connected to an input of the second buffer.