Integrated memory circuit with output preliminory precharge.

摘要

The invention relates to memories produced in integrated-circuit form, and especially to large-capacity memories required to have fast access time. According to the invention it is proposed to effect reading in two stages, precharging then reading. The data output pins (IOPAD) on which the information read from the memory appears are precharged to a value intermediate between the high logic level and the low logic level. A circuit (I7, I8) for storing the logic state on the pin and an inverter with threshold (IS1, IS2) make it possible to achieve this result.