发明名称 |
INTERFACE CIRCUIT INCLUDING BUFFER CIRCUIT FOR HIGH SPEED COMMUNICATION, SEMICONDUCTOR APPARATUS AND SYSTEM INCLUDING THE SAME |
摘要 |
A buffer circuit can include an amplification unit and an active load unit. The amplification unit is coupled to an output node and configured to sense and amplify first and second signals. The active load unit forms a peak of a signal outputted from the output node when a level of the signal which is outputted from the output node is transitioned. |
申请公布号 |
KR20160105085(A) |
申请公布日期 |
2016.09.06 |
申请号 |
KR20150028311 |
申请日期 |
2015.02.27 |
申请人 |
SK HYNIX INC. |
发明人 |
HWANG, KYU DONG |
分类号 |
G11C7/10;G11C5/14;G11C7/06 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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