Architectural structure of a process netlist design tool

摘要

A computer-implemented design tool architecture provides a mechanism for characterizing a circuit at a hardware level. The tool architecture has a medium for storing a description of an application specific integrated circuit (ASIC), where the description describes the ASIC at a behavioral level of a hierarchy. A library of foundry primitives map known ASIC components to code sets for a hardware description language (HDL). The tool architecture further includes a command interpreter for generating an electronic file based on a set of predefined computer-based commands such that the electronic file characterizes the circuit at the hardware level. The hardware level is at a lower level in the hierarchy than the behavioral level.