| 摘要 |
An RRAM cell-based nonvolatile SRAM memory cell comprises a conventional six-transistor SRAM cell (6T-SRAM) and two 1T1R RRAM cells. The 6T-SRAM comprises: two N-type transistors (NAL, NAR), respectively connected to a data line (Q, QB) and a bit line (BL, BLB) on a same side. Four transistors (PL, NL, PR, NR) form two cross-coupled inverters, and outputs of the inverters are a first data line (Q) and a second data line (QB). Each of the two RRAM cells comprises a resistance-variable resistor (RL, RR) and a transistor (RNSL, RNSR). A cathode of the resistance-variable resistor (RL, RR) is connected to a corresponding data line (Q, QB) on a same side, an anode of the resistance-variable resistor (RL, RR) is connected to a source of the corresponding transistor (RNSL, RNSR), a drain of the transistor (RNSL, RNSR) is connected to a bit line (BLB, BL) on an opposite side, and a gate of the transistor (RNSL, RNSR) is connected to a resistance word line (RWL). The storage cell can maintain the advantages of data storage, low power consumption of a standby mode of a memory and simple operations even in a case in which automatic data recovery and power-off are implemented. |
