发明名称 Structure and method for determining isolation of integrated circuit elements
摘要 A wafer substrate test structure and method provides a novel means for quantitatively determining electrical isolation between active devices and passive elements in a monolithic integrated circuit. The structure and method of this invention are useful for both optimal design and manufacture of integrated circuit devices.
申请公布号 US5254941(A) 申请公布日期 1993.10.19
申请号 US19910784259 申请日期 1991.10.29
申请人 SGS-THOMSON MICROELECTRONICS, INC. 发明人 OSIKA, DAVID M.
分类号 G01R31/28;H01L23/544;(IPC1-7):G01R31/02 主分类号 G01R31/28
代理机构 代理人
主权项
地址