发明名称 Semiconductor memory device having diagnostic circuit for comparing multi-bit read-out test data signal with multi-bit write-in test data signal stored in serial-input shift register
摘要 A dynamic random access memory device is subjected to a diagnosis upon completion of fabrication to see whether or not a defective memory cell is incorporated in memory cell sub-arrays, one of the input/output data buffer circuits incorporated therein transfers test bits in serial to a shift register which in turn transfers the test bits in parallel to data line pairs for writing the test bits into the memory cell sub-arrays, and a comparator compares the test bits read out from the memory cell sub-arrays with the test bit stored in the shift register for producing a diagnostic signal indicative of consistence or inconsistence between the test bits read out from the memory cell sub-arrays and the test bits in the shift register, thereby allowing an external diagnostic system with data pins less than the input/output data buffer circuits to carry out the diagnosis.
申请公布号 US5406566(A) 申请公布日期 1995.04.11
申请号 US19930139717 申请日期 1993.10.22
申请人 NEC CORPORATION 发明人 OBARA, TAKASHI
分类号 G11C29/00;G01R31/28;G11C29/32;G11C29/34;G11C29/38;(IPC1-7):G01R31/28 主分类号 G11C29/00
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