发明名称 Priority encoder
摘要 A priority encoder-includes an encoder for coding an input consisting of a plurality of bits, selectors, respectively provided for bit input terminals of the encoder, for respectively receiving corresponding ones of a plurality of bits of an operand input, each of the selectors including a switch circuit to be controlled by an operand input bit, a carry line connected in series with the switch circuit and connected in series with all of the selectors, a first precharge circuit, connected to a carry line portion on one end side of the switch circuit, for precharging the carry line at a predetermined timing, a first detector which is controlled by an enable signal for designating upper bit priority and detects whether a potential of a carry line portion on an upper bit side of the switch circuit is at a discharge level, a second detector which is controlled by an enable signal for designating lower bit priority and detects whether a carry line portion on a lower bit side of the switch circuit is at a discharge level, and a third detector for detecting whether one of outputs from the first and second detectors and the operand input bit are both in an active state.
申请公布号 US5511222(A) 申请公布日期 1996.04.23
申请号 US19950375009 申请日期 1995.01.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SHIBA, MASUE;NAKATA, SHIGEHARU
分类号 H03M7/00;G06F7/74;(IPC1-7):G06F15/00 主分类号 H03M7/00
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