发明名称 DATA COMMUNICATION SYSTEM
摘要 PURPOSE:To prevent noise from being mis-recognized to be a clock signal by sending a data signal synchronously with the clock signal sent via a clock signal line so as to attain high speed data communication. CONSTITUTION:When a trigger signal is sent from a CPU1 to a CPU2 via a 1st trigger signal line 6, a data signal is sent from the CPU1 to the CPU2 via a 1st data signal line 3 synchronously with the clock signal. Conversely when the trigger signal 2 is sent from the CPU2 to the CPU1 via a 2nd trigger signal line 7, the data signal is sent from the CPU 2 to the CPU1 via the 2nd signal line 4 synchronously with the clock signal.
申请公布号 JPH0685874(A) 申请公布日期 1994.03.25
申请号 JP19920259069 申请日期 1992.09.02
申请人 HONDA MOTOR CO LTD 发明人 INAGAWA SHINICHI;MATSUDA SHOHEI;YAHAGI TOSHIO
分类号 H04L7/04;G06F13/40;H04L29/08 主分类号 H04L7/04
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