发明名称 |
SIGNAL PROCESSING CIRCUIT, CIRCUIT SUBSTRATE, AND PROJECTOR |
摘要 |
An image processing circuit includes a front stage signal processing circuit that performs processing of input data and outputs the data and a rear stage signal processing circuit that performs processing which is to be performed on the data obtained after processing of the input data performed by the front stage signal processing circuit and outputs the data. The image processing circuit is configured to be switchable to one state of a first state that performs processing of the input data using the front stage signal processing circuit, subsequently performs processing of the data using the rear stage signal processing circuit, and outputs the data, a second state that performs processing of the input data using the front stage signal processing circuit and outputs the data, and a third state that performs processing of the input data using the rear stage signal processing circuit and outputs the data. |
申请公布号 |
US2016269699(A1) |
申请公布日期 |
2016.09.15 |
申请号 |
US201415031541 |
申请日期 |
2014.11.06 |
申请人 |
Seiko Epson Corporation |
发明人 |
HASU Tatsuhiro;YAMAMOTO Takekuni |
分类号 |
H04N9/31;G09G3/20;G09G3/36;G09G5/02 |
主分类号 |
H04N9/31 |
代理机构 |
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代理人 |
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主权项 |
1. A signal processing circuit comprising:
a front stage signal processing circuit that performs processing of input data and outputs the data; and a rear stage signal processing circuit that performs processing which is to be performed on the data obtained after processing of the input data performed by the front stage signal processing circuit and outputs the data, wherein the signal processing circuit is configured to be switchable to one state of
a first state that performs processing of the input data using the front stage signal processing circuit, subsequently performs processing of the data using the rear stage signal processing circuit, and outputs the data,a second state that performs processing of the input data using the front stage signal processing circuit and outputs the data, anda third state that performs processing of the input data using the rear stage signal processing circuit and outputs the data. |
地址 |
Tokyo JP |