发明名称 ELEMENT DESTRUCTION PREVENTING SYSTEM
摘要 PURPOSE:To match to a real parts at high speed by providing a first input vector supply means for supplying an input vector to the real parts and a second input vector supply means having a means for limiting a current passing when the supplied input vector collides against the output of the real parts. CONSTITUTION:At the time of a simulation of the (n+1)th times (n>=0), the relevant input vectors to the nth which are already simulated are applied by the use of the first input vector supply means assuring the high speed without passing a buffer resistance, the input vector of the (-n+1)th in number is applied by the use of the second input vector supply means for preventing an element destruction due to a signal collision through the buffer resistance and the (n+1)th input vector is provided with an input vector supply switching control means 102 having the switching function of a timing control function and the input vector supply means of the second system for applying a real chip after an input signal uncertain period by the buffer resistance. Thereby, the preventing function for the element destruction by the output signal collision of the real real chip and a logical simulator can be realized without the high speed characteristic of the real chip.
申请公布号 JPS63106050(A) 申请公布日期 1988.05.11
申请号 JP19870151138 申请日期 1987.06.19
申请人 HITACHI LTD 发明人 IKEDA NAOYA;KIMURA KOICHI;OKAZAKI YOSHINOBU
分类号 G06F11/25;G06F11/26;G06F17/50 主分类号 G06F11/25
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