| 发明名称 | Semiconductor package and method of manufacturing the same | ||
| 摘要 | A semiconductor package includes a wiring substrate including a plurality of solder pads; a chip including a plurality of chip pads connected to the solder pads through a plurality of solders; a sealing layer configured to seal the chip and the solders, at least one void being between the solders; and a solder extrusion prevention layer on one sidewall of the solder exposed by the at least one void. | ||
| 申请公布号 | US9412712(B2) | 申请公布日期 | 2016.08.09 |
| 申请号 | US201514722742 | 申请日期 | 2015.05.27 |
| 申请人 | SAMSUNG ELECTRONICS, CO., LTD | 发明人 | Jang Jin-wook;Yoo Se-jin;Cho Sung-il;Choi Jae-ho |
| 分类号 | H01L23/48;H01L23/00;H01L23/498;H01L23/31;H01L25/065 | 主分类号 | H01L23/48 |
| 代理机构 | Onello & Mello, LLP | 代理人 | Onello & Mello, LLP |
| 主权项 | 1. A semiconductor package comprising: a wiring substrate including a plurality of solder pads; a chip including a plurality of chip pads connected to the solder pads through a plurality of solders; a sealing layer configured to seal the chip and the solders, at least one void being between the solders; and a solder extrusion prevention layer on one sidewall of the solder exposed by the at least one void. | ||
| 地址 | KR | ||