发明名称 FinFETs with strained well regions
摘要 A device includes a substrate and insulation regions over a portion of the substrate. A first semiconductor region is between the insulation regions and having a first conduction band. A second semiconductor region is over and adjoining the first semiconductor region, wherein the second semiconductor region includes an upper portion higher than top surfaces of the insulation regions to form a semiconductor fin. The semiconductor fin has a tensile strain and has a second conduction band lower than the first conduction band. A third semiconductor region is over and adjoining a top surface and sidewalls of the semiconductor fin, wherein the third semiconductor region has a third conduction band higher than the second conduction band.
申请公布号 US9455320(B2) 申请公布日期 2016.09.27
申请号 US201514725299 申请日期 2015.05.29
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lee Yi-Jing;Wu Cheng-Hsien;Ko Chih-Hsin;Wann Clement Hsingjen
分类号 H01L21/70;H01L29/161;H01L29/78;H01L29/66;H01L29/10;H01L29/417;H01L29/778;H01L29/165;H01L21/321;H01L29/43;H01L29/06 主分类号 H01L21/70
代理机构 Slater Matsil, LLP 代理人 Slater Matsil, LLP
主权项 1. A method comprising: recessing a portion of a substrate between two insulation regions to form a recess; performing a first epitaxy to grow a first semiconductor region in the recess, wherein the first semiconductor region is relaxed; performing a second epitaxy to grow a second semiconductor region in the recess, wherein the second semiconductor region is over and contacting the first semiconductor region; performing a planarization to level top surfaces of the second semiconductor region and the insulation regions; recessing the insulation regions, wherein a top portion of the second semiconductor region over the insulation regions forms a semiconductor fin; and performing a third epitaxy to grow a third semiconductor region on a top surface and sidewalls of the semiconductor fin, wherein the second semiconductor region has a conduction band lower than conduction bands of the first and the third semiconductor regions.
地址 Hsin-Chu TW
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