发明名称 SEMICONDUCTOR DEVICE OR ELECTRONIC DEVICE INCLUDING THE SAME
摘要 A semiconductor device with lower power consumption and an electronic device including the same are provided. To reduce leakage current flowing in a word line driver circuit, a switching element is provided, specifically, between the word line driver circuit and a high or low voltage power source. When there is no memory access, the switching element is turned off, thereby interrupting application of voltage (or current) from the high or low voltage power source to the word line driver circuit. Furthermore, to reduce the stand-by power due to precharge of a bit line, a switching element is provided in a bit line driver circuit, specifically, between the bit line and a high or low voltage power source. When there is no memory access, the switching element is turned off, thereby interrupting application of voltage (or current) from the high or low voltage power source to the bit line driver circuit.
申请公布号 US2016233866(A1) 申请公布日期 2016.08.11
申请号 US201615017879 申请日期 2016.02.08
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 ISHIZU Takahiko;UESUGI Wataru
分类号 H03K19/0175;H03K19/00;G11C5/14;G11C11/413 主分类号 H03K19/0175
代理机构 代理人
主权项 1. A semiconductor device comprising a first circuit, a first transistor, and a second transistor, wherein the first circuit includes a NAND circuit and an inverter circuit, wherein the inverter circuit includes a first input terminal, a first output terminal, a first potential input terminal, and a second potential input terminal, wherein the NAND circuit includes a second input terminal, a third input terminal, a second output terminal, a third potential input terminal, and a fourth potential input terminal, wherein the second output terminal is electrically connected to the first input terminal, wherein the first potential input terminal is electrically connected to one of a source and a drain of the first transistor, wherein the fourth potential input terminal is electrically connected to one of a source and a drain of the second transistor, wherein a potential from a high potential power source is input to the other of the source and the drain of the first transistor, wherein a potential from a low potential power source is input to the other of the source and the drain of the second transistor, and wherein the first transistor is a p-channel transistor and the second transistor is an n-channel transistor.
地址 Atsugi-shi JP