Integrated circuits and methods for operating integrated circuits with non-volatile memory

摘要

Integrated circuits and methods for fabricating integrated circuits are provided. In an exemplary embodiment, an integrated circuit includes a semiconductor substrate doped with a first conductivity-determining impurity. The semiconductor substrate has formed therein a first well doped with a second conductivity-determining impurity that is different from the first conductivity-determining impurity, a second well, formed within the first well, and doped with the first conductivity-determining impurity, and a third well spaced apart from the first and second wells and doped with the first conductivity-determining impurity. The integrated circuit further includes a floating gate structure formed over the semiconductor substrate. The floating gate structure includes a first gate element disposed over the second well and being separated from the second well with a dielectric layer, a second gate element disposed over the third well and being separated from the third well with the dielectric layer, and a conductive connector.

主权项

1. An integrated circuit comprising:
a semiconductor substrate comprising a semiconductive layer and a bottom insulative layer disposed below the semiconductive layer, the semiconductive layer having formed therein:
a first well doped with a first conductivity determining impurity;source and drain regions disposed adjacent to the first well and doped with a second conductivity-determining impurity that is different from the first conductivity-determining impurity, wherein the source and drain regions extend entirely through the semiconductive layer so as to be in contact with the bottom insulative layer;a second well spaced apart from the first well by an insulating trench and doped with the first conductivity-determining impurity; anda plurality of highly-doped regions formed within the second well that extend entirely through the semiconductive layer so as to be in contact with the bottom insulative layer; a floating gate structure formed over the semiconductor substrate and comprising:
a first gate element disposed over the first well and being separated from the first well with a dielectric layer;a second gate element disposed over the second well and being separated from the second well with the dielectric layer, wherein the second gate element comprises at least two prongs that extend substantially parallel to one another from a common base portion of the second gate element, each of the at least two prongs being disposed over a separate portion of the second well and between ones of the plurality of highly-doped regions; anda conductive connector that electrically connects the first and second gate elements; a first terminal formed of an electrical contact to the first well; and a second terminal formed of electrical contacts to the second well.