发明名称 Substrate for in-cell type touch sensor liquid crystal display device and method of fabricating the same
摘要 An array substrate for an in-cell type touch sensor liquid crystal display device includes: a substrate; a gate line and a data line on the substrate; a thin film transistor connected to the gate line and the data line; a first passivation layer on the thin film transistor; a common electrode on the first passivation layer; an etching preventing pattern covering the drain contact hole; an x sensing line and a y sensing line on the common electrode; a second passivation layer on the x sensing line and the y sensing line; and a pixel electrode on the second passivation layer.
申请公布号 US9465246(B2) 申请公布日期 2016.10.11
申请号 US201514930902 申请日期 2015.11.03
申请人 LG Display Co., Ltd. 发明人 Kim Min-Su;Lee Myeong-Sik
分类号 G06F3/041;G06F3/044;G02F1/1333;G02F1/1362;G02F1/1343;G02F1/1368;H01L27/12;G06F3/047 主分类号 G06F3/041
代理机构 Morgan, Lewis & Bockius LLP 代理人 Morgan, Lewis & Bockius LLP
主权项 1. A method of fabricating an array substrate for an in-cell type touch sensor liquid crystal display device, the method comprising: forming a gate line, an auxiliary sensing line, a data line, and a thin film transistor on a substrate including a plurality of touch blocks each including a plurality of pixel regions, the gate line and the data line crossing each other with an interlayer insulating layer interposed therebetween to define each of the plurality of pixel regions, the auxiliary sensing line formed under the interlayer insulating layer, and the thin film transistor connected to the gate line and the data line; forming a first passivation layer on the thin film transistor, the first passivation layer having a first drain contact hole exposing a drain electrode of the thin film transistor; forming a common electrode and an etching preventing pattern on the first passivation layer, the common electrode disposed in each of the plurality of touch blocks, the etching preventing pattern spaced apart from the common electrode, and the etching preventing pattern having an area greater than the drain contact hole to completely cover the drain electrode; forming an x sensing line and a y sensing line on the common electrode, the x sensing line overlapping the gate line and the y sensing line overlapping the data line; forming a second passivation layer on the x sensing line and the y sensing line, the second passivation layer having a second drain contact hole exposing the etching preventing pattern; and forming a pixel electrode and a connecting pattern on the second passivation layer in each of the plurality of pixel regions, the pixel electrode contacting the etching preventing pattern through the second drain contact hole and having a plurality of open areas each having a bar shape, wherein the first passivation layer has a first sensing hole exposing the interlayer insulating layer corresponding to an end portion of the x sensing line, wherein the second passivation layer has a second sensing hole exposing the end portion of the x sensing line in the first contact hole, wherein the interlayer insulating layer has a third sensing hole exposing an end portion of the auxiliary sensing line, and wherein the connecting pattern contacts the end portion of the x sensing line and the end portion of the auxiliary sensing line.
地址 Seoul KR