发明名称 Programmable logic circuit and nonvolatile FPGA
摘要 A programmable logic circuit according to an embodiment includes: a first programmable device with a first and second terminals, a resistance of the first programmable device being changeable from a high resistance to a low resistance; a second programmable device with a third and fourth terminals, a resistance of the second programmable device being changeable from a high resistance to a low resistance; a first wiring line to which the first terminal is connected; a second wiring line to which the third terminal is connected; a third wiring line to which the second terminal and the fourth terminal are connected; and a fuse element of which one terminal is connected to the third wiring line.
申请公布号 US9425801(B2) 申请公布日期 2016.08.23
申请号 US201514691641 申请日期 2015.04.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 Yasuda Shinichi;Tatsumura Kosuke;Matsumoto Mari;Oda Masato
分类号 H03K19/177;H03K19/173 主分类号 H03K19/177
代理机构 Finnegan, Henderson, Farabow, Garrett & Dunner, LLP 代理人 Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
主权项 1. A programmable logic circuit comprising: a first programmable device with a first terminal and a second terminal, a resistance of the first programmable device being changeable from a high resistance to a low resistance; a second programmable device with a third terminal and a fourth terminal, a resistance of the second programmable device being changeable from a high resistance to a low resistance; a first wiring line to which the first terminal of the first programmable device is connected; a second wiring line to which the third terminal of the second programmable device is connected; a third wiring line to which the second terminal of the first programmable device and the fourth terminal of the second programmable device are connected; and a fuse element of which one terminal is connected to the third wiring line, wherein each programmable device is a MOS transistor including a source, a drain and a gate, each of the first and third terminals is one of the source and the drain, and each of the second and fourth terminals is the gate.
地址 Tokyo JP