发明名称 Differential signal output circuit
摘要 A differential signal output circuit is equipped with a first output stage including serially connected transistors QP1 and QN1, a second output stage including serially connected transistors QP2 and QN2, an input device 11-13 that supplies two signals having mutually reversed phases to the gate of the first output stage and the gate of the second output stage, respectively, based on an input signal, and a current supply device QP3 that supplies specified drain current to the first and second output stages.
申请公布号 US2002167333(A1) 申请公布日期 2002.11.14
申请号 US20020123082 申请日期 2002.04.12
申请人 USUI TOSHIMASA 发明人 USUI TOSHIMASA
分类号 H03K19/0175;H03F3/45;H03K5/151;H03K17/687;H03K19/0185;H04L25/02;(IPC1-7):H03K19/017;H03K19/094 主分类号 H03K19/0175
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