Stacked nanowire device width adjustment by gas cluster ion beam (GCIB)

摘要

A method of making a nanowire device incudes disposing a first nanowire stack over a substrate, the first nanowire stack including alternating layers of a first and second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; disposing a second nanowire stack over the substrate, the second nanowire stack including alternating layers of the first and second semiconducting materials, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.

主权项

1. A method of making a nanowire device, the method comprising:
disposing a first nanowire stack of a first transistor over a substrate, the first nanowire stack comprising alternating layers of a first semiconducting material and a second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface of the first nanowire stack; disposing a second nanowire stack of a second transistor over the substrate, the second nanowire stack comprising alternating layers of the first semiconducting material and the second semiconducting material, the first semiconducting material contacting the substrate and the second semiconducting material being an exposed surface of the second nanowire stack; forming a first gate spacer along a sidewall of a first gate region on the first nanowire stack and a second gate spacer along a sidewall of a second gate region on the second nanowire stack; oxidizing a portion of the first nanowire stack within the first gate spacer of the first gate region; and removing the first semiconducting material from the first nanowire stack and the second nanowire stack.