MEMORY CONTROLLER, MEMORY SYSTEM, AND DECODING METHOD

摘要

A memory controller includes: an encoder configured to generate a block product code which includes a first code and a second code as component codes, the first code and the second code being linear cyclic codes; a memory interface configured to write the block product code to a nonvolatile memory, and to read a received word from the nonvolatile memory; and a decoder configured to perform a decoding using a code constraint corresponding to a generator polynomial as a common divisor between a generator polynomial of the first code and a generator polynomial of the second code with respect to a symbol of an area which is not subjected to a code constraint of the first code but subjected to a code constraint of the second code.

主权项

1. A memory controller comprising:
an encoder configured to generate a block product code which includes a first code and a second code as component codes, the first code and the second code being linear cyclic codes; a memory interface configured to write the block product code to a nonvolatile memory, and to read a received word corresponding to the block product code from the nonvolatile memory; and a decoder configured to perform a decoding with respect to a symbol of an area using a code constraint, the code constraint corresponding to a third generator polynomial, the third generator polynomial being a common divisor between a first generator polynomial and a second generator polynomial, the first generator polynomial being a generator polynomial of the first code, the second generator polynomial being a generator polynomial of the second code, the area being included in the block product code and not subjected to a code constraint of the first code but subjected to a code constraint of the second code in the received word.