<p>A device having power management capabilities and a method (300) for power management, the method (300) includes: providing (310) a clock signal and a supply voltage to at least one component of a device; detecting (330) a timing error; delaying (350) by a fraction of a clock cycle and in response to the detected timing error, a clock signal provided to at least one of the components; and determining (370) a clock signal frequency and a level of the supply voltage in response to at least one detected timing error.</p>
申请公布号
WO2008015495(A1)
申请公布日期
2008.02.07
申请号
WO2006IB52671
申请日期
2006.08.03
申请人
FREESCALE SEMICONDUCTOR, INC.;PRIEL, MICHAEL;KUZMIN, DAN;ROZEN, ANTON