发明名称 |
Memory devices having data lines included in top and bottom conductive lines |
摘要 |
Some embodiments include apparatuses and methods having a first set of conductive lines, a second set of conductive lines, and memory cells located in different levels of the apparatuses and arranged in memory cell strings. At least a portion of the first set of conductive lines is configured as a first set of data lines. At least a portion of the second set of conductive lines is configured as a second set of data lines. Each of the memory strings is coupled to a respective conductive line in the first set of conductive lines and a respective conductive line in the second set of conductive lines. Other embodiments including additional apparatuses and methods are described. |
申请公布号 |
US9437253(B2) |
申请公布日期 |
2016.09.06 |
申请号 |
US201414330737 |
申请日期 |
2014.07.14 |
申请人 |
Micron Technology, Inc. |
发明人 |
Tanzawa Toru |
分类号 |
G11C5/06;G11C16/04;H01L27/115;G11C8/14 |
主分类号 |
G11C5/06 |
代理机构 |
Schwegman Lundberg & Woessner, P.A. |
代理人 |
Schwegman Lundberg & Woessner, P.A. |
主权项 |
1. An apparatus comprising:
a first set of conductive lines located on a first level of the apparatus; a second set of conductive lines located on a second level of the apparatus; memory cell strings, each of the memory strings coupled to a respective conductive line in the first set of conductive lines and a respective conductive line in the second set of conductive lines; and a module configured to obtain information from a first portion of the memory cell strings through a portion of the first set of conductive lines and to obtain information from a second portion of the memory cell strings through a portion of the second set of conductive lines. |
地址 |
Boise ID US |