发明名称 CLOCK GENERATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To allow for highly accurate phase control of a polyphase clock by a clock generation circuit, while maintaining the frequency of polyphase clock constant.SOLUTION: A clock generation circuit outputting a polyphase clock includes a ring oscillator having a plurality of inverter circuits in annular connection, and outputting each clock having a delay time that is given based on a delay control signal from each inverter circuit, a first divider circuit for dividing the frequency of an injection clock by a first value and outputting as a reference clock, a second divider circuit for dividing the frequency of an injection clock by a second value and outputting as a comparison clock, and a frequency comparator for comparing the frequencies of the reference clock and comparison clock, and outputting the delay control signal based on the comparison results. The ring oscillator is configured to adjust the delay time based on the delay control signal.SELECTED DRAWING: Figure 1
申请公布号 JP2016116097(A) 申请公布日期 2016.06.23
申请号 JP20140253754 申请日期 2014.12.16
申请人 MEGA CHIPS CORP 发明人 TANIHIRA IZUHO
分类号 H03L7/24;G06F1/06;H03K3/03;H03L7/00 主分类号 H03L7/24
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