| 摘要 |
A memory circuit is described which has an output data strobe signal that indicates when valid data is available on the output lines. Several alternate signals and circuits are described which can be used for the output strobe signal. An echo clock signal is described which selectively follows an input clock signal in a synchronous memory system and indicated when valid output data is available. The output strobe signal is used to speed the reading of data from the output line by allowing a microprocessor, or other external circuit, to read the data from the output lines as soon as it is valid, thereby eliminating the need to wait a specified period of time. |
