Integrated circuit barrierless microfluidic channel

摘要

A structure and method for fabricating a continuous cooling channel in the back end of line wiring levels of an integrated circuit (IC) chip is provided. This continuous cooling channel may provide a path for a cooling source such as a fluid pumped from an external fluidic-cooling circulation driver to make physical contact locally with and cool the back end levels within the IC chip that may generate heat as a byproduct of the IC device's routine operations. Such a cooling structure is achieved by removing a horizontal portion of a barrier layer from an intermediate region of an interlevel interconnect structure, selective to a vertical portion of the barrier layer located on a sidewall of the interlevel interconnect structure, using gas cluster ion beam etching as well as removing the bulk conductor by additional means.

主权项

1. A method of forming a continuous cooling channel in a back end of the line (BEOL) of an integrated circuit (IC) chip, the method comprising:
providing a first interconnect level having a first conductive filler layer formed on a substrate,
wherein the first conductive filler layer comprises a first dielectric layer between a first conductive feature and a second conductive feature,wherein the first conductive filler layer is composed of a material comprising at least one of Cu or Al; forming a second interconnect level on an upper surface of the first interconnect level,
wherein the second interconnect level comprises a second dielectric layer and a sacrificial layer,wherein the second conductive filler layer is composed of a material comprising at least one of Cu or Al; forming a pair of openings in the second interconnect level to expose an upper surface of the first conductive feature and an upper surface of the second conductive feature; lining each of the openings with a barrier layer such that the barrier layer is on at least the upper surface of the first conductive feature, the upper surface of the second conductive feature, and a sidewall of each of the openings; forming a seed layer on the barrier layer, wherein the seed layer is composed of a material comprising at least one of Cu, Al, or alloys thereof; removing a horizontal portion of a barrier layer from each of the openings using gas cluster ion beam etching to expose an upper surface of the first conductive filler layer wherein a vertical portion of the barrier layer located on the sidewall of each of the openings remains intact,
wherein the gas cluster ion beam etching comprises impacting the horizontal portion of the barrier layer with a cluster ion beam comprising at least one of Ar, He, Ne, Xe, N2, H2, NH3, or N2H2; filling each of the openings with a second conductive filler layer, wherein the second conductive filler layer in each of the openings is in contact with the upper surface of the first conductive feature and the upper surface of the second conductive feature; removing, by a wet etch selective to the barrier layer, the second conductive filler layer from each of the opening and the first conductive filler layer to form a continuous cooling channel; and forming an electrical interconnect adjacent to the continuous cooling channel, the electrical interconnect having one or more layers of a conductive material separated by a horizontal portion of a barrier layer.