发明名称 Image pickup device
摘要 An image pickup device according to the present invention is an image pickup device in which a plurality of pixel are arranged in a semiconductor substrate. Each of the plurality of pixels includes a photoelectric conversion element, a floating diffusion (FD) region, a transfer gate that transfers charges in the first semiconductor region to the FD region, and an amplification transistor whose gate is electrically connected to the FD region. The photoelectric conversion element has an outer edge which has a recessed portion in plan view, a source region and a drain region of the amplification transistor are located in the recessed portion, and the FD region is surrounded by the photoelectric conversion region or is located in the recessed portion in plan view.
申请公布号 US9362319(B2) 申请公布日期 2016.06.07
申请号 US201414515373 申请日期 2014.10.15
申请人 Canon Kabushiki Kaisha 发明人 Tashiro Kazuaki;Kikuchi Shin
分类号 H01L29/66;H01L27/146;H01L31/02 主分类号 H01L29/66
代理机构 Canon USA, Inc. IP Division 代理人 Canon USA, Inc. IP Division
主权项 1. An image pickup device in which a plurality of pixels are arranged in a semiconductor substrate, each of the plurality of pixels comprising: a photoelectric conversion element including a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type, the second semiconductor region constituting a PN junction together with the first semiconductor region; a floating diffusion region of the first conductivity type; a transfer gate that transfers charges in the first semiconductor region to the floating diffusion region; an amplification transistor whose gate is electrically connected to the floating diffusion region; and a reset transistor that discharges charges in the floating diffusion region, the image pickup device further comprising a wiring line connected to a gate of the reset transistor, wherein an outer edge of the first semiconductor region has a recessed portion in plan view, wherein the gate of the amplification transistor and the gate of the reset transistor are disposed in the recessed portion, wherein, the wiring line connected to the gate of the reset transistor includes: a first portion extending in a direction of a pixel row of the plurality of pixels,a second portion, extending in a direction of a pixel column of the plurality of pixels, being connected to the first portion and arranged along the first semiconductor region, anda third portion connected to the second portion, and connected to the gate of the reset transistor over the recessed portion, and wherein the floating diffusion region is surrounded by the first semiconductor region or is located in the recessed portion in plan view.
地址 Tokyo JP