发明名称 Semiconductor memory with sense amplifier
摘要 In an exemplary aspect, the present invention provides a semiconductor memory device including sense amplifiers that drive bit lines to which memory cells are connected, and driver transistors that supply a power supply to the sense amplifiers, wherein the sense amplifiers are arranged in rows and constitutes a first sense-amplifier row in which transistors of a first conductive type are arranged and a second sense-amplifier row in which transistors of a second conductive type are arranged, and the driver transistors constitutes at least one transistor row including a first driver transistor of the first conductive type corresponding to the first sense-amplifier row and a second driver transistor of the second conductive type corresponding to the second sense-amplifier row between the first sense-amplifier row and the second sense-amplifier row.
申请公布号 US9406352(B2) 申请公布日期 2016.08.02
申请号 US201514797397 申请日期 2015.07.13
申请人 RENESAS ELECTRONICS CORPORATION 发明人 Takahashi Hiroyuki
分类号 G11C7/06;G11C11/4094;G11C11/4097;G11C5/02;G11C7/08;G11C11/4091;H01L27/02;H01L27/105;H01L27/108;G11C11/408 主分类号 G11C7/06
代理机构 Young & Thompson 代理人 Young & Thompson
主权项 1. A semiconductor memory device, comprising: a plurality of sense amplifiers, each of the sense amplifiers amplifying a difference in potential between a pair of bit lines; a plurality of sense amplifier drivers supplying a power supply to the sense amplifiers, each of the sense amplifier drivers having a first driver transistor and a second driver transistor, the first driver transistor having a different conductivity type from the second driver transistor, the first driver transistor and the second driver transistor being alternately arranged in a first direction, and an element separation boundary arranged between the first driver transistor and the second driver transistor in a second direction which is different from the first direction, wherein a third direction orthogonal to a direction of gate length of the first driver transistor is parallel to the first direction, wherein a fourth direction orthogonal to a direction of gate length of the second driver transistor is parallel to the first direction, wherein the first direction is parallel to the extending direction of word lines.
地址 Kanagawa JP
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