发明名称 Minimum error detection in a viterbi decoder
摘要 A Viterbi decoder for decoding a convolutional code. For each possible state, an accumulated error AE is maintained at 66. As each codeword Rx-GP is received, the errors between it and the code groups of all the transitions are determined at 65. For each possible new state, logic 68 determines the errors of the two transitions leading from old states to that new state, adds them the accumulated errors of those two old states, and determines the smaller of the two sums. Path logic 67 records the corresponding transition, updating a record of the path leading to the new state. Tracing back along a path a predetermined and sufficiently large number of transitions, the input bit or bits corresponding to the transition so reached are taken as the next bit or bits in the stream of decoded bits. The unit 57 comprises a tree of comparators fed with the accumulated errors. The accumulated errors are limited, before being fed to unit 57, by a set of limiters 76 to values less than the maximum error upper bound.
申请公布号 US2002112211(A1) 申请公布日期 2002.08.15
申请号 US20010904411 申请日期 2001.07.12
申请人 PMC SIERRA LIMITED 发明人 BRICK CORMAC
分类号 H03M13/41;(IPC1-7):H03M13/03 主分类号 H03M13/41
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