Distribution of an electronic reference clock signal that includes delay and validity information

摘要

An integrated circuit has a clock subsystem, and a circuit. The clock subsystem is configured to provide a reference clock signal to a first module and a second module. The circuit is configured to distribute information describing characteristics of the reference clock signal to the second module. The information distributed with the circuit enables the second module to adapt the reference clock signal based on the information.

主权项

1. An integrated circuit comprising:
a clock subsystem configured to provide a reference clock signal to a first module and a second module; and a circuit configured to distribute information describing characteristics of the reference clock signal to the second module, wherein the information distributed with the circuit enables the second module to adapt the reference clock signal based on the information and includes delay and validity information indicating when and whether the reference clock signal is valid and timing information on when a frequency of the reference clock signal changes.