Counter based design for temperature controlled refresh

摘要

A DRAM includes: a temperature sensor for monitoring a temperature operating condition of the DRAM; and a binary counter coupled to the temperature sensor, for receiving external commands to perform a refresh operation, and incrementing a count upon each received external command, wherein the refresh operation will be selectively skipped according to a value of the binary counter. The binary counter is activated to a first mode when the temperature sensor determines the temperature operating condition of the DRAM goes below a first threshold and activated to a second mode when the temperature sensor determines the temperature operating condition of the DRAM goes below a second threshold lower than the first threshold.

主权项

1. A DRAM, comprising:
a binary counter, for receiving external commands at a steady rate, and selectively outputting an internal refresh command in response to each received external command to perform a refresh operation, wherein a binary value of the binary counter will be incremented upon each received external command, and the internal refresh command will be selectively output according to at least one of a most significant bit and a least significant bit of the binary counter so that the refresh operation will be selectively skipped according to a value of the binary counter.