| 发明名称 |
USER-LEVEL FORK AND JOIN PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS |
| 摘要 |
A processor of an aspect includes a plurality of processor elements, and a first processor element. The first processor element may perform a user-level fork instruction of a software thread. The first processor element may include a decoder to decode the user-level fork instruction. The user-level fork instruction is to indicate at least one instruction address. The first processor element may also include a user-level thread fork module. The user-level fork module, in response to the user-level fork instruction being decoded, may configure each of the plurality of processor elements to perform instructions in parallel. Other processors, methods, systems, and instructions are disclosed. |
| 申请公布号 |
US2016283245(A1) |
申请公布日期 |
2016.09.29 |
| 申请号 |
US201514671475 |
申请日期 |
2015.03.27 |
| 申请人 |
INTEL CORPORATION |
发明人 |
Ben-Kiki Oren;Pardo Ilan;Robison Arch D.;Cownie James H. |
| 分类号 |
G06F9/38;G06F12/08;G11C7/10 |
主分类号 |
G06F9/38 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A processor comprising:
a plurality of processor elements; and a first processor element to perform a user-level fork instruction of a software thread, the first processor element including: a decoder to decode the user-level fork instruction, wherein the user-level fork instruction is to indicate at least one instruction address; and a user-level thread fork module, in response to the user-level fork instruction being decoded, to configure each of the plurality of processor elements to perform instructions in parallel. |
| 地址 |
Santa Clara CA US |
