PHASE LOCKING METHOD AND DEVICE

摘要

PROBLEM TO BE SOLVED: To phase-lock a clock to a digital audio signal embedded in a digital video signal. SOLUTION: A frequency divider 4 generates a first reference frequency signal from samples of the digital audio signal and a frequency divider 6 generates a second reference frequency signal from an audio sampling frequency signal. A phase detector 8, loop filters 10, 12 generate a low jitter clock control signal from the first and second reference frequency signals and a VOC 14 generates an output audio sampling frequency signal from the low jitter clock control signal.