发明名称 MEMORY SYSTEM WITH AN ARITHMETIC OPERATION CIRCUIT AND A PATTERN DETECTOR
摘要 <p>Memory systems (155) include an array of storage cells (159) arranged in a row and column arrangement. A plurality of data write lines (320) coupled to the array are configured to supply data into a selected row of the array. A plurality of data read lines (325, 330) coupled to the array are configured to receive data from a selected column of the array in a single read operation. An arithmetic operation circuit (310) coupled to the plurality of data read lines is configured to generate a result value (355) based on data read from the storage cells of a selected column of the array. Methods of detecting a pattern, such as a color code pattern, are also provided.</p>
申请公布号 WO2007044095(A1) 申请公布日期 2007.04.19
申请号 WO2006US22345 申请日期 2006.06.08
申请人 SONY ERICSSON MOBILE COMMUNICATIONS AB;CAMP, JR., WILLIAM O. 发明人 CAMP, JR., WILLIAM O.
分类号 G01S19/25;G11C7/10;G01S1/00 主分类号 G01S19/25
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