| 发明名称 | Pulse width modulator for high speed digitally controlled voltage regulator | ||
| 摘要 | Described is a pulse width modulation architecture for high speed digitally controlled voltage regulator. Described is an apparatus which comprises: a first phase interpolator (PI) for coupling an input to a delay element of a delay line, wherein the coupling is via a selection unit; a second PI for coupling an output of the delay element of the delay line, wherein the coupling is via the selection unit; and a third PI for providing an output, the third PI calibrated according to delay settings of the first and second PIs. | ||
| 申请公布号 | US9385698(B2) | 申请公布日期 | 2016.07.05 |
| 申请号 | US201314129276 | 申请日期 | 2013.06.28 |
| 申请人 | Intel Corporation | 发明人 | Krishnamurthy Harish K.;Matthew George E.;Thiruvengadam Bharani |
| 分类号 | H03L7/06;H03K5/13;H03K7/08;H03L7/081;H02M3/158;G06F1/32;H03K5/00 | 主分类号 | H03L7/06 |
| 代理机构 | Blakely, Sokoloff, Taylor & Zafman LLP | 代理人 | Blakely, Sokoloff, Taylor & Zafman LLP |
| 主权项 | 1. An apparatus comprising: a first phase interpolator (PI) for coupling an input to a delay element of a delay line, wherein the coupling is via a selection unit; a second PI for coupling an output of the delay element of the delay line, wherein the coupling is via the selection unit; and a third PI for providing an output, the third PI calibrated according to delay settings of the first and second PIs. | ||
| 地址 | Santa Clara CA US | ||