| 摘要 |
<p>Systems (500, 530, 900) and methods (800) that control the switching transition times or profile of a ramped voltage write signal (535) used for programming or erasing at least a wordline (309) of an array (300, 920) of multi-bit and/or multi-level flash memory cells (200) are provided. In one embodiment, this goal is accomplished by applying a ramped or otherwise controlled profile write voltage (535) to the flash memory cells (304) in order to avoid disturb issues to the unselected (non-targeted) neighboring memory cells (305), which preserves the existing state of the neighboring cells (305) while keeping the design as compact and manageable as possible yet maintains a high write speed. The systems and method are applicable to, and reliable for various memory technologies, since the size of the steps or other such functional transitions of the ramped voltage profile (535) can be adjusted or trimmed (590) to any level of resolution required.</p> |
