发明名称 NAND structure ROM device production
摘要 A ROM production process involves (a) selectively removing an amorphous silicon intrinsic layer (24) on a first insulating layer (32) on a semiconductor substrate (30) to form parallel spaced-apart diffusion zones (36) as bit lines oriented in a first direction; (b) implanting first type dopant ions into the diffusion zones (36) for predetermined threshold voltage adjustment; (c) forming spacers (40) on the diffusion zone side walls and forming a second insulating layer (42) on the first insulating layer (32), the diffusion zones and the spacers; (d) selectively removing a conductive layer (44), applied on the second insulating layer (42), to form parallel spaced-apart gate zones (46) as word lines oriented in a second direction and overlapping the bit lines to define a memory cell array, the diffusion zones being divided into several channel zones (48) below the gate zones and several source/drain zones (50) between the channel zones; (e) forming second spacers (49) on the gate zone side walls; (f) depositing a mask layer on the second insulating layer (42), the gate zones (46) and the second sidewall spacers and patterning to expose first locations on the gate zones for forming a first group of memory cells set to a permanently 'OFF' state without exposure of second locations on the gate zones, thus forming a second group of memory cells set to a permanently 'ON' state; (f) implanting second type dopant ions into the exposed channel zones of the permanently 'OFF' memory cells but not the channel zones of the permanently 'ON' memory cells; (g) forming a third insulating layer (54) over the second insulating layer, the gate zones and the second sidewall spacer elements (49); (h) forming windows through the third and second insulating layers to define source/drain contact windows, which expose all the source/drain zones, and gate contact windows which expose a selected number of locations on gate zones of the permanently 'ON' memory cells; and (i) filling the windows with conductive material to form gate electrodes and source/drain electrodes. A ROM device is also claimed.
申请公布号 DE19723652(A1) 申请公布日期 1998.10.01
申请号 DE1997123652 申请日期 1997.06.05
申请人 UNITED MICROELECTRONICS CORP., HSINCHU, TW 发明人 WEN, JEMMY, HSINCHU, TW
分类号 G11C17/00;H01L21/8246;H01L21/84;H01L27/112;(IPC1-7):H01L21/824 主分类号 G11C17/00
代理机构 代理人
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