发明名称 Circuit for producing pulse signals with a desired duty cycle
摘要 <p>An integrated circuit has a first circuit which receives an input signal and outputs a first output signal, wherein the first output signal is produced by changing the pulse width of the input signal, a second circuit which receives the first output signal and outputs a second output signal, wherein the second output signal is produced by delaying the first output signal and a control circuit. The control circuit has a first control circuit which receives the first and second output signals and controls the first circuit based on the first and second output signals and a second control circuit which receives the first and second output signals and controls the second circuit based on the first and second output signals. <IMAGE></p>
申请公布号 EP0930709(B1) 申请公布日期 2002.09.25
申请号 EP19990100394 申请日期 1999.01.18
申请人 NEC CORPORATION 发明人 YAMAGUCHI, HIROSHI
分类号 H03K5/04;H03K5/13;H03K5/131;H03K5/151;H03K5/156;(IPC1-7):H03K5/13;H03K3/017 主分类号 H03K5/04
代理机构 代理人
主权项
地址