Single-lane, twenty-five gigabit ethernet

摘要

Technologies for high-speed data transmission including a network port logic having a communication lane coupled to a physical medium dependent/physical medium attachment (PMD/PMA) sublayer, a physical coding sublayer (PCS), and a media access control (MAC) sublayer. The communication lane receives serial binary data at a line speed such as 25 gigabits per second. The PMD/PMA converts the serial binary data into parallel data, and the PCS decodes that parallel data using a line code also used for a slower line speed such as 10 gigabits per second. The network port logic may include four independent communication lanes, with each communication lane coupled to a dedicated PMD/PMA, PCS, and MAC. The network port logic may also include a multi-lane PCS and multi-lane MAC to receive and transmit data striped over the four communication lanes. Other embodiments are described and claimed.

主权项

1. A network port logic for high-speed data transmission, the network port logic comprising:
a first physical medium dependent sublayer/physical medium attachment sublayer (PMD/PMA) logic coupled to a first communication lane to convert first serial binary data received via the first communication lane at a first line transmission speed to first parallel data, and a second PMD/PMA logic to convert second serial binary data to second parallel data received at a second line transmission speed, wherein the second transmission line speed is less than the first line transmission speed; a first physical coding sublayer (PCS) logic coupled to the first PMD/PMA logic to decode, when the network port logic is not in a multi-lane mode, the first parallel data to first decoded parallel data using a first line code also used by a second PCS logic, coupled to the second PMD/PMA logic, to decode the second parallel data to second decoded parallel data when the network port logic is not in the multi-lane mode; a multi-lane PCS logic coupled to the first PMD/PMA logic and the second PMD/PMA logic to convert, when the network port logic is in the multi-lane mode, a parallel data comprising first parallel data and second parallel data to a decoded parallel data using a second line code different than the first line code; a first media access control (MAC) logic coupled to the first PCS logic to convert the first decoded parallel data to first Ethernet frame data at a first data rate determined by the first line transmission speed and a second MAC logic coupled to the second PCS logic to convert the second decoded parallel data to second Ethernet frame data at a second data rate determined by the second line transmission speed when the network port logic is not in the multi-lane mode and; and a multi-lane MAC logic coupled to the multi-lane PCS logic to convert, when the network port logic is in the multi-lane mode, to convert the decoded parallel data to Ethernet frame data at a data rate comprising a sum of the first and second line transmission speeds.