发明名称 |
TUNNEL TRANSISTOR, LOGICAL GATE COMPRISING TRANSISTOR, STATIC RANDOM-ACCESS MEMORY USING LOGICAL GATE, AND METHOD FOR MAKING SUCH TUNNEL TRANSISTOR |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a tunnel transistor which comprises a first gate and a second gate and can be used with smaller difference in voltages between the first gate and the second gate. <P>SOLUTION: A tunnel transistor 1 comprises: a drain 2; a source 4; and at least a first gate 6 for controlling current between the drain 2 and the source 4. A first side 9 of a first gate dielectric material 7 and a first side 13 of a second gate dielectric material 11 are positioned substantially along and substantially in contact with a first semiconductor part 14 and a second semiconductor part 15, respectively. <P>COPYRIGHT: (C)2013,JPO&INPIT |
申请公布号 |
JP2013080906(A) |
申请公布日期 |
2013.05.02 |
申请号 |
JP20120186608 |
申请日期 |
2012.08.27 |
申请人 |
IMEC;KATHOLIEKE UNIV LEUVEN KU LEUVEN R&D |
发明人 |
HEYNS MARC;CEDRIC HUYGHEBAERT;ANN S VERHULST;DANIELE LEONELLI;ROOYACKERS RITA;DEHAENE WIM |
分类号 |
H01L21/336;H01L21/8234;H01L27/088;H01L27/10;H01L29/66;H01L29/78;H03K19/20 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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