发明名称 DELTA SIGMA MODULATOR AND DELTA SIGMA AD CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide a delta sigma modulator that easily generates a plurality of clocks required for control of a switch circuit while automatically holding a phase relationship among a plurality of the clocks when a clock frequency is changed. SOLUTION: In the delta sigma modulator, a ring oscillator 10 is formed by three delay circuits 11A, 11B and 11C respectively provided with a differential amplifier. A clock generation circuit 30 generates a plurality of clocks for controlling a switch of a switch circuit by delaying a three-phase clock outputted from the ring oscillator 10 with delay circuits 33, 34 and 35. A common current of each differential amplifier of the three delay circuits 11A, 11B and 11C of the ring oscillator 10 has a proportional relationship with a common current I<SB>C</SB>of each differential amplifier 111 of the three delay circuits 33, 34 and 35 of the clock generation circuit 30. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009005050(A) 申请公布日期 2009.01.08
申请号 JP20070163608 申请日期 2007.06.21
申请人 SANYO ELECTRIC CO LTD;SANYO SEMICONDUCTOR CO LTD 发明人 HASEGAWA KAZUO
分类号 H03M3/02 主分类号 H03M3/02
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