Semiconductor chip and semiconductor chip package each having signal paths that balance clock skews

摘要

A semiconductor chip is provided. The semiconductor chip includes a first circuit, a second circuit, a third circuit, a first signal path and a second signal path. The first circuit provides a reference signal. The first signal path includes a first conductive trace and transmits the reference signal from the first circuit to the second circuit. The second signal path transmits the reference signal from the first circuit to the third circuit. Timing skews of the first and second signal paths are balanced and the first and second signal paths are routed globally.

主权项

1. A semiconductor chip, comprising:
a first circuit, providing a reference signal; a second circuit; a third circuit; a first signal path, comprising a first conductive trace, wherein the reference signal is transmitted from the first circuit to the second circuit via the first signal path; and a second signal path, wherein the reference signal is transmitted from the first circuit to the third circuit via the second signal path, wherein timing skews of the first and second signal paths are balanced for the reference signal, and the first and second signal paths are routed globally, wherein the first, second and third circuits are disposed inside an integrated circuit region, and the first and second signal paths are disposed in a margin area between a boundary of the semiconductor chip and a boundary of the integrated circuit region.